For most of the past thirty years, the semiconductor industry ran on a remarkably clean division of labor. Everybody knew their place.

The caricature was almost this simple: TSMC printed. Memory makers crammed capacitors. Designers drew. And the money followed the drawing.

TSMC took designs from Nvidia, Apple, AMD, Broadcom and others and reproduced them in silicon with a discipline nobody else could match. More importantly, it resolutely avoided becoming a product company competing with its own customers. That neutrality became one of its greatest assets. Companies that would reveal almost nothing to one another were willing to entrust TSMC with their most valuable intellectual property long before a product reached the market. TSMC’s prosperity depended on manufacturing their ideas, not replacing them with its own.

Memory occupied another well-defined lane. Samsung, SK hynix and Micron certainly designed extraordinarily sophisticated products, but economically they were treated largely as manufacturers: fit more bits into less silicon, improve yields, lower the cost per bit, and survive the next cycle. The products were relatively standardized. Pricing was brutal. Excess capacity could destroy profits almost overnight.

Much of the industry’s architectural power sat elsewhere. Nvidia, Broadcom, Apple and Qualcomm defined the architecture. TSMC manufactured it. Memory companies supplied a critical ingredient. The architects told the rest of the industry what to make and captured a disproportionate share of the value.

That arrangement is beginning to break. We’ve discussed the shifting power between designers and manufacturers in our notes before (here and here), but this note is about something different.

What is taking it apart is Samsung’s unusual shape and its sudden ability to pay for that shape.

Chip manufacturing has reached the point where the next gains require the old partitions to dissolve. Design and manufacturing. Logic and memory. Packaging and die-printing. What moves inside a package and what moves between packages. Power, heat and data movement are making those boundaries harder to preserve. A company that can optimize across several of them now holds something its competitors have to answer.

A few months ago, in Goliath’s World and the Encroachment Imperative, we wrote about giants eating the hardware middle class, moving into adjacent layers because complexity drew them in and because the specialists could no longer keep up. That was giants against everybody else. This is the sequel. The giants are still consuming the middle class. They have now started on each other.

It is also a sequel to Memory by Design, where we argued that memory and logic have begun to merge. The merging still looks elementary. Its consequences do not. Memory becoming architectural territory puts pressure on boundaries that TSMC and Nvidia once relied upon.

So the two layers that spent three decades taking what they were given, the foundries and the memory makers, are now pushing into the layer that used to tell them what to make. They can afford to. They are the richest companies in the industry. The layer being pushed has seen it coming and is pushing back downward. Nvidia is extending its design authority into the memory stack itself. SK hynix and TSMC have been deepening the kind of alliance neither of them needed while the old order held. Samsung, making both logic and memory, is the force they are arranging themselves against. 

Much ink will be spent in the coming years on the shifting sands between the semiconductor and chip design giants. This mirrors what is already happening with the reduced monopolistic dominance of software and services giants today. An important aspect at present is how it all started with Samsung making more money than anyone ever in the history of human businesses and giving wings to its ambitions.   

The company we said to own

Two years ago, we did something presumptuous: we wrote an open note to Warren Buffett suggesting that, if he ever wanted to own a semiconductor company, he should look at Samsung Electronics. We returned to the case a year later, asking whether Elon Musk’s manufacturing ambitions might lead him to consider a strategic stake in Samsung. The argument was never that Samsung was the best semiconductor company.

Samsung is not the world’s best foundry. TSMC is – by a margin that became painful enough, for Samsung, that we later devoted an entire piece to watching the two companies diverge over twenty years. TSMC won not merely the process race but the financial one: higher and steadier profits, better yields and eventually the valuation premium as well. Samsung has not lately been the best maker of high-bandwidth memory either. SK hynix took that crown.

Our case was about something else. Shape.

Samsung is the only semiconductor company of its scale with a leading-edge memory business, a leading-edge logic foundry, and advanced packaging capabilities within the same corporate structure. In the three-dimensional manufacturing era the industry is now entering, the control that shape makes possible is worth more than anyone has tried to put a number on.

This point is barely discussed anywhere, as far as we know, and the reason is, once again, in Samsung’s history. For much of the past twenty years, that shape looked less like an advantage than a tax.

The foundry consumed enormous capital while falling farther behind TSMC. Memory profits rose and fell with the cycle. Organizational silos meant that possessing several extraordinary capabilities did not automatically make Samsung extraordinary at combining them. Rather, given the paucity of resources, Samsung became a player far behind the cutting edge in the foundries, never seen as a threat because it just did not have sufficient capital to make an attempt. Samsung itself has been one of the best demonstrations of someone who had spread itself too thin. 

What changed is the money. We have written about its scale twice: first when the profits arrived without precedent, then when we asked whether memory pricing had moved to a permanently higher plateau. The consequence is what matters here. The memory business now earns on a scale that lets Samsung fund all three legs at once, sustain the foundry through a prolonged development effort and pursue research whose commercial returns may lie beyond this decade.

The numbers are worth saying once. Samsung has committed around KRW110 trillion this year, roughly US$73 billion, to plant and research across the company: about $46-47 billion of capital expenditure and another $26-27 billion of R&D.

Samsung’s capex alone is larger than estimated mainland Chinese spending on semiconductor fab equipment this year. TSMC, however, has now raised its own 2026 capex guidance to an extraordinary $60-64 billion. Samsung’s rivals also have the resources to respond at extraordinary scale. The frontier itself has become a place where individual companies deploy capital on the scale of national semiconductor programs every year.

Samsung’s research budget still gives its peculiar corporate shape enormous new freedom. Group-wide R&D is running at roughly $27 billion this year, against about $8 billion at TSMC last year. In fact, TSMC’s total five-year spend on research is $30bn.

Samsung Electronics’ R&D spans businesses well beyond semiconductors, while TSMC’s is concentrated on semiconductor manufacturing. The totals therefore measure different scopes of research. The important point is that Samsung suddenly has more money than TSMC.

Memory profits now let Samsung fund memory, foundry, packaging, and speculative research at once. Samsung can now fund ambitions across memory, logic, and packaging on a scale that the company that has humiliated it for a decade cannot afford to ignore.

It is worth pausing on this comparison: For years, many have feared China’s semiconductor industry rise given its astronomical spending. Samsung’s annual capital expenditure alone now exceeds the estimate for mainland China’s semiconductor fab-equipment spending, although the measures cover different categories of investment.

This is the reason behind our title, the Frontier Express. Few have noticed how the resource-rich frontier has now begun to move forward. Even China’s catching up may be yesterday’s story.

Integration was always possible on paper. It has only just become affordable. The shape was a strength ahead of its time. The time has arrived. That is why Samsung’s competitors should be more worried today than they were before, when the organization chart looked identical.

The slab under the memory

High-bandwidth memory is built as a tower. Several layers of DRAM sit one above another. Underneath them sits a final piece of silicon called the base die. It is the foundation of the stack. It is the layer through which the memory communicates with the world outside.

For most of HBM’s life, that foundation was essentially plumbing. It moved signals, managed connections, and did the housekeeping required to make the memory above it work. Nobody thought of it as particularly valuable architectural territory. This was up until now.

The base die is moving onto increasingly advanced logic processes.

The same broad class of manufacturing technology is used to make processors. Its footprint is largely dictated by the memory stack sitting above it. The foundation has to sit underneath the building whether or not every square millimeter of that foundation is being put to sophisticated use. This creates a rather unusual situation. Beneath advanced HBM stacks, increasingly capable logic silicon is opening up new territory for whoever designs it.

Functions that once had to sit on the processor can begin migrating onto it. Decisions that once belonged entirely to the chip architect can begin being made inside the memory stack. The boundary between “the processor” and “the memory” starts becoming less obvious than the words suggest.

We explored the architectural possibilities in Memory by Design. Here, the question is: Who controls this increasingly valuable territory?

The EDA fabric hiding manufacturers’moats

It’s easy to misread what is happening. When a memory company or a foundry produces something clever, the instinct is to treat the cleverness itself as the advantage: Samsung has become better at design, perhaps TSMC has moved a little farther into system architecture, and therefore some value shifts toward manufacturing. But that explanation is too shallow. If the advantage were merely a better drawing, it would not last very long.

We have used the phrase “instant copyability” to describe the erosion of cognitive moats in a world suffused with generative AI. Once a design ships, competitors and their AIs can inspect it, understand it and reproduce much of what matters, increasingly quickly. A manufacturer therefore gains little durable advantage from becoming simply another clever designer. The real advantage lies in what an outside designer cannot inspect in a finished product: thousands of tiny manufacturing steps, tolerances, and process tricks that are hard to codify, yet collectively matter as much as a master painter’s brushstrokes.

For decades, the industry kept that knowledge on one side of the wall while letting thousands of customers design against it. A foundry did not give Nvidia or Apple a manual containing everything it had learned about making silicon. It translated the portion customers needed into process design kits, device models, design rules, standard cells, and verification decks. These were then embodied in the electronic design automation flows supplied by Synopsys, Cadence and others.

EDA became the membrane between manufacturing and design. The fab effectively said: keep these wires this far apart, make this connection no narrower than this, expect this transistor to behave within these parameters and we can manufacture what you draw. The designer did not need to know why a tolerance existed, how many failed experiments preceded it, or what the manufacturing line might already be capable of beyond it. Decades of process learning were distilled into a set of abstractions within which everybody could design.

That arrangement preserved the division of labor beautifully. Manufacturers could retain their deepest know-how while exposing enough of it for customers to innovate. Competing designers worked from broadly the same set of disclosed capabilities. But there was an important asymmetry buried inside the arrangement: the rulebook was never the manufacturing knowledge itself. It was only the part of that knowledge the manufacturer was ready to publish.

That distinction is becoming much more valuable.

New sequences of 3D manufacturing

Until now, design therefore sat downstream of manufacturing disclosure, by calendar as much as by construction. An architect could not confidently design around a capability that the foundry had not yet characterized, qualified and translated into a usable design environment. In a world dominated by two-dimensional chips, that delay was manageable. In the emerging world of three-dimensional semiconductor structures, it increasingly reaches into the architecture itself.

Consider a modern AI system bringing together logic, SRAM, HBM, and eventually optical I/O. The conventional assumption is that the architectural intelligence belongs primarily to companies such as Nvidia or AMD, while the manufacturers execute what those architects devise. But questions such as where heat should leave the structure, where power should enter, how far a vertical connection should travel, how two dies should be bonded, or where logic should sit relative to memory are no longer neatly divisible into “design” followed by “manufacturing.” Increasingly, the manufacturing choice and the architectural choice are the same choice.

More importantly, some of those choices must be made while the relevant manufacturing technology is still being developed. By the time a capability is sufficiently understood and repeatable to appear in a process design kit and become usable through standard EDA flows, the manufacturer may already have spent years learning what it can and cannot do.

The resulting asymmetry is not chiefly one of intelligence. It is one of information and time. A manufacturer can design against capabilities it knows are coming because it possesses the process data, defect history, thermal measurements and yield learning that indicate what may become feasible two or three generations ahead. An external designer sees the same capability later, once enough uncertainty has been removed for it to be exposed safely to customers.

That changes where architectural power can accumulate. Knowing today that a bonding process will reliably hold a certain tolerance in 2028 can justify a floorplan that an outsider cannot yet defend. Knowing where defects actually occur can determine where repair circuitry deserves its area. Knowing where heat concentrates can alter a structure before an external designer even knows that the hotspot exists.

None of those advantages can simply be copied from the finished product. The real asset is not the drawing. It is the accumulated measurement behind the drawing.

For decades, designers captured enormous value by drawing the best chip possible inside the rules manufacturers gave them. The emerging opportunity for manufacturers is to begin drawing before those rules have even been written.

Samsung moves first

Samsung has now begun to describe this opportunity in almost exactly those terms.

At its September keynote in Taipei, the company introduced CUBE, a framework for pushing three-dimensional structures across its memory business. Three of its four pillars are familiar enough:

• Increase capacity by building upward.
• Widen bandwidth by shortening the path between dies.
• Reduce the energy required to move each bit.

The fourth is more consequential. Samsung calls it utilization, but the underlying question is architectural: Where should the logic sit, where should the memory sit, and which functions should move between them? Samsung’s claim is that owning both sides gives it more freedom to answer that question.

That is a subtle but important change in posture. Samsung is no longer presenting memory, foundry, and packaging simply as three businesses that happen to share a parent company. Increasingly, it is presenting them as ingredients that can be sold and developed together. The attraction to a customer is obvious. Instead of coordinating a memory supplier, a logic foundry and an advanced-packaging partner separately, a customer can potentially ask one organization to optimize the interfaces among all three.

The market is beginning to test the proposition. Broadcom has already engaged Samsung across memory, advanced logic, and packaging rather than through a single product category. Samsung is trying to deepen similar relationships with other large accelerator customers. AMD’s Lisa Su has visited Seoul twice in seven months. The company’s next-generation accelerators demand sharply more HBM. Korean reporting makes clear that Samsung wants the memory relationship to pull foundry and packaging work behind it.

That does not mean the bundle automatically wins. Samsung’s foundry still carries the scars of the past decade. Customers with access to TSMC have every reason to separate the attractive part of Samsung’s offering from the parts they trust less. The same AMD discussions reportedly illustrated that tension: Samsung had leverage through memory, yet the foundry work remained a much harder sell. Vertical integration is not the same thing as vertical competence. Owning memory, logic, and packaging under one roof only matters if Samsung can persuade customers that combining them improves the finished product more than mixing and matching best-of-breed suppliers would.

What matters at this stage is not whether Samsung can already displace TSMC or SK hynix in any particular account. It is that Samsung now has the financial resources, the technological breadth and, increasingly, the strategic intent to keep testing how far integration can be pushed.

If even part of that model works, the competitive question changes. The issue is no longer simply who makes the best memory, the best logic process or the best package in isolation. It is who can make those layers work together with the least friction and the greatest control. Just as the GPU stopped being merely a compute chip and became an architecture spanning memory, interconnect, networking and the rack, semiconductor manufacturing is beginning to stop being merely the act of printing a die and become the orchestration of logic, memory, packaging, power and thermals as one manufacturing system. Samsung is unusually placed to pioneer that transition.

Samsung also possesses one advantage that does not depend on winning every piece of business. It is the only major memory producer that does not have to invite another leading-edge foundry into the foundation of its most advanced memory products. As HBM base dies move onto more sophisticated logic processes, SK hynix and Micron increasingly need outside foundry partners. Samsung can keep that learning loop in-house.

Once one company can combine the layers internally, the others can no longer treat those layers as separate markets.

Everyone Answers

We should remember that none of the companies being encroached upon is short of money, technical depth, or ambition. These companies read technological tea leaves years before financial markets, which remain remarkably capable of staring at next quarter’s memory prices while missing what the resulting cash is about to finance.

SK hynix is the clearest example. Remarkably little serious work has been done on what it might build with a windfall that could take operating profit toward $200 billion this year. We get the headline capex number, roughly $35 billion, but mostly as a measure of how much capacity is being added rather than as a clue to the moats that may be getting built alongside it.

Samsung and SK hynix together are expected to finish the year with roughly $263 billion of net cash, more than twice Nvidia’s. They are beginning to deploy resources on a scale that only a handful of companies in history have possessed. This is not merely to make more memory, but to build capabilities unavailable to competitors without comparable money, process knowledge, and time.

TSMC’s resource pool is hardly standing still. At $60-64 billion, its capital expenditure this year will actually exceed Samsung’s. Almost all of it is concentrated on the manufacturing problem in which TSMC already leads. Its answer to Samsung’s breadth can therefore be greater depth: better logic processes, more advanced packaging, more capacity and a neutral integration platform through which many different memory and processor companies can meet. Samsung has the attraction of one roof; TSMC has the accumulated learning of being the roof under which much of the industry already operates.

It also begins this contest with something Samsung cannot buy overnight: a formidable lead in cutting-edge logic manufacturing, packaging execution and customer trust.

So Samsung’s breadth does not leave its competitors cornered. It changes the problem they have to solve. Samsung can integrate through ownership. The obvious answer is integration by contract.

SK hynix has moved closest to that model with TSMC. TSMC supplies the logic base die for its next generations of HBM. Memory design, logic process and advanced packaging are increasingly developed together rather than sequentially. What once looked like a straightforward relationship between a component supplier and a foundry is beginning to resemble a jointly assembled manufacturing platform. Micron is moving in the same direction for customized memory, though its ecosystem is less developed.

That is a much bigger change than the words “foundry partnership” suggest. A memory company is now inviting an outside logic manufacturer into one of the most consequential pieces of its highest-value product. The foundry is learning how that memory will be built, packaged, and connected years before it reaches the market. Samsung can keep much of that learning inside the company. SK hynix has chosen to recreate it across company boundaries.

TSMC, meanwhile, is becoming something rather different from the foundry of twenty years ago. It still does not need to design the customer’s accelerator. Maintaining that neutrality remains central to its model. But around the die it now orchestrates an expanding set of technologies: advanced logic, base dies, 2.5D packaging, 3D stacking, wafer-level integration and increasingly the electrical and optical connections between them. The more difficult it becomes to separate those pieces, the more valuable the company that defines the manufacturing environment in which they must all work together.

The partnership’s public scope is clear; its detailed division of intellectual property, economics and decision-making is not. Its effectiveness will depend on how well the companies coordinate across that boundary. 

Neither model is obviously superior. Samsung avoids some coordination costs but carries weaker businesses and internal silos. The TSMC-SK hynix model combines companies that are individually stronger in their respective domains, but every important optimization must cross an organizational boundary. 

And there is still a third elephant in the room. The companies doing this integration are suppliers to the firms that historically decided what the system should look like.

Nvidia takes the pen

The largest customer in this ecosystem has been watching the same boundaries move from the other side. For Nvidia, the danger is not that Samsung or SK hynix suddenly becomes better at drawing logic. It is that memory stops being interchangeable. Once a supplier owns an increasingly important piece of architecture inside the memory stack, switching suppliers becomes harder. Qualification takes longer. The component Nvidia can least afford to lose begins to acquire bargaining power over the entire accelerator. Apple’s plight in recent weeks shows why Nvidia would be reluctant to let memory makers and TSMC encroach unhindered.

Its answer is unusually revealing. In August, Nvidia introduced NVHBM, in which the memory controller moves off the accelerator and into the HBM base die. But instead of allowing the memory manufacturer to own that architectural layer, Nvidia designs the custom base die and controller itself. It has the memory companies validate and manufacture it. NVIDIA says the arrangement can deliver up to 30% more bandwidth, 15% lower HBM power and materially more usable compute area on the XPU. The engineering gains matter, but the strategic decision matters more: Nvidia has reached into the memory stack and taken authorship of the part that was becoming interesting. 

There is another clue in the way Nvidia is commercializing it. NVHBM is intended to be available from multiple memory suppliers, not a bespoke technology tied to one manufacturer. That preserves something Nvidia has always valued enormously: substitutability. If Samsung, SK hynix and Micron can all build memory around an Nvidia-defined base die and controller, innovation can move deeper into the stack without handing any one memory vendor control of the interface. 

Nvidia is also taking the idea beyond its own GPUs. NVHBM sits inside NVLink Fusion, the platform through which hyperscalers can connect their own custom accelerators to Nvidia’s interconnect and rack architecture. Amazon’s Annapurna Labs is the first announced collaborator. The company that once sold a GPU is therefore increasingly specifying how somebody else’s accelerator talks to memory, how it joins the scale-up fabric, and how the resulting machine fits into the rack.

This is encroachment running in the opposite direction. Nvidia has no reason to build a memory fab, just as it has no reason to build a leading-edge logic fab. Its defense is to move the boundary of what it designs farther downward, leaving manufacturing to others while keeping control over the interfaces through which their products connect to its architecture.

What is striking is how closely the engineering directions are beginning to converge. The controller is migrating toward the memory. Interfaces are becoming more customized. Logic and memory are being designed more intimately together. The disagreement is no longer primarily over what should happen. It is over who gets to draw it.

The circle tightens

These moves are beginning to reinforce one another. Samsung’s ability to combine memory, logic and packaging raises the value of integration. SK hynix cannot reproduce that structure internally, so it binds itself more tightly to TSMC. TSMC consequently moves deeper into the most valuable part of the memory system. Nvidia then sees memory gaining too much of its own architecture and pushes its specification down into the base die. Each company’s defense therefore shifts another boundary that the next company can no longer ignore. And this is before we see responses emerging from other giants in chip design. 

There is no obvious resting point. If Nvidia succeeds in making several memory companies manufacture to one Nvidia-defined architecture, it will create pressure on other chip designers to get involved in their own HBM. Memory-makers will not mind such customization drives, even if the value of their own designed memory does not increase as much in the face of more design-led competition. All of this is hypothetical for now. The main point is about the loops of innovation we discussed in an earlier note.   

The people between the giants

Our encroachment imperative note was about what happens to specialists when giants move sideways. This time, the pressure comes from several directions at once. Businesses whose value rested chiefly on an interface being standard and independently supplied look particularly exposed: memory-controller IP, generic die-to-die blocks, some package-design functions, and eventually parts of the design-service layer. If the interface becomes important enough for Nvidia, Samsung, a memory producer, or a foundry to own directly, there is less room for somebody whose business consists of sitting between them.    

The outcome will be less tidy for packaging and testing. The leading foundries have pulled advanced packaging inward. Demand has repeatedly outrun their capacity and pushed work back towards outsourced semiconductor assembly and test (OSAT). Complexity can therefore destroy one specialist while making another indispensable.

Even the EDA companies are moving away from their old role as neutral translators of foundry rules. They are participating much earlier in customer-specific optimization. The common thread is that being an intermediary is becoming less valuable. Owning scarce knowledge, capacity, or qualification remains extremely valuable.

Terafab and the moving frontier

There is one important attempt to run the argument in reverse. If manufacturing companies can move toward architecture, why shouldn’t a sufficiently rich architect build its way into manufacturing?

Terafab is the cleanest experiment yet. SpaceX and Tesla describe a closed-loop facility combining advanced logic, memory, packaging and testing. Mask design and fabrication are brought much closer to the workloads that ultimately consume the chips. The first Grimes County phase commits more than $16.8 billion. The proposed complex will eventually exceed 100 million square feet. SpaceX’s own prospectus describes the objective explicitly: design, fabrication and deployment brought together so that each manufacturing cycle can feed the next design cycle more quickly. The ambition is enormous. The amount committed so far is not.

The headline Terafab numbers sound enormous until you put them beside the frontier it hopes to join. Its $16.8 billion first phase amounts to roughly one quarter of TSMC’s capital expenditure in a single year. Samsung will spend more than four times that amount on plant and research this year, while SK hynix is itself heading towards roughly twice that sum in annual capex. These incumbents will repeat much of that spending next year while learning from the factories already running.

That is the difficulty with entering this race late. Terafab does not have to catch TSMC, Samsung, or SK hynix as they are today. If meaningful production begins several years from now, it has to catch companies that will meanwhile have invested another hundred billion dollars or more, qualified several additional process generations, accumulated billions of additional manufacturing measurements and begun optimizing technologies that are still roadmaps today. The target is moving while the pursuer builds its starting line. Terafab need not match every incumbent capability to produce useful chips for its own customers. Matching their leading-edge economics, yields and breadth is the harder ambition.

Of course, semiconductor manufacturing does not yield its frontier merely to capital. Japan has supplied a useful contemporary experiment. Rapidus was created in 2022. It has around $15 billion of government backing, access to IBM technology and an ecosystem assembled specifically to restore Japan to the leading edge. Four years later, it has demonstrated serious technical progress and still targets mass production only in fiscal 2027, with commercial customers remaining the central unresolved question. Nobody regards that timetable as unusually slow; by semiconductor standards, it is extraordinarily fast.

Intel offers an even harsher lesson. It began with decades of leading-edge manufacturing knowledge, existing fabs, equipment relationships and thousands of experienced engineers. Yet recovering a lost process lead has consumed years and enormous amounts of capital. GlobalFoundries eventually decided the economics of remaining at the frontier no longer justified continuing its 7nm program at all. The difficulty is therefore not unique to new entrants. Once manufacturing leadership is lost, money shortens the journey only so far.

Terafab itself has already acknowledged part of that reality. Intel joined the project in April. Tesla intends to use Intel’s 14A manufacturing process rather than invent a leading-edge process from scratch. Last week, reports of possible TSMC involvement prompted Musk to clarify that Tesla and SpaceX intend to build and operate Terafab themselves. TSMC could potentially lease part of the site. The project remains genuinely vertically ambitious, but its first steps already draw upon manufacturing knowledge accumulated elsewhere. 

That is precisely the point. Tools can be bought. Engineers can be recruited. Process technology can be licensed. What cannot be installed with the equipment is the history behind the equipment: years of defect maps, process-window adjustments, tool matching, contamination failures, thermal measurements, yield excursions, packaging mistakes and customer qualifications. Manufacturing leadership is partly a stock of machinery and largely a stock of accumulated learning.

Announcements are the easy part

None of this guarantees that the increasingly integrated structures described in this note will work. Three-dimensional integration compounds yield problems rather than abolishing them. Bonding tolerances narrow. Heat becomes harder to remove. Power delivery becomes more difficult. Package warpage and signal integrity become system problems. Qualification still has to be repeated customer by customer. An elegant roadmap structure may be impossible to manufacture economically at the required volume.

Even good ideas arrive with a bill. Moving a chip’s power supply to the back of the wafer is the headline feature of the next logic generation. It genuinely improves efficiency. It requires thinning the silicon so far that heat can no longer spread sideways. Simulation work shows the resulting hotspots are meaningfully hotter than the arrangement they replace. The change also lets designers pack circuits more tightly, which raises the power density that caused the problem.

Samsung does not have to win every contest for its ambitions to change the industry. It now has the money to pursue memory, logic, and packaging together. It can sustain expensive experiments and keep pressing where those businesses meet. Its rivals must make their own investment and architectural decisions while that challenge develops. Waiting for Samsung to prove every part of the proposition would mean waiting too long.

TSMC’s deeper integration platform, SK hynix’s network of foundry alliances, and Nvidia’s move into the HBM base die each has its engineering logic. Samsung’s expanding ambitions add competitive urgency to all three. Their responses, in turn, raise the demands on Samsung. The result is a frontier advancing through the interaction of exceptionally well-funded competitors, making the task harder for anyone still trying to reach it.

Markets can count the capacity that today’s profits will finance. The more consequential question is what those profits allow Samsung to attempt and what those attempts force others to do. The years ahead will contain fascinating developments in semiconductor technology, spurred ironically by memorymakers and foundries rather than the designers.

Nilesh Jasani is the founder and CEO of GenInnov Pte Ltd Singapore. Vibhu Sharma is a veteran of the semiconductor industry and a strategic technology advisor for GenInnov.

Originally published by GenInnov, this article is republished with permission. Read more at www.geninnov.ai/blog.